A) Field of the Invention
The present invention relates to a semiconductor device manufacturing method, and more particularly to a method of manufacturing a semiconductor device having a silicide layer on a silicon surface.
B) Description of the Related Art
An electric conductivity of a semiconductor device can be adjusted by doping impurities into semiconductor. A low resistivity, at approximately the same level as a metal resistivity, cannot be obtained. The gate electrode and source/drain electrodes of a MOS transistor are desired to have a resistance as small as possible. In order to lower the resistance of an electrode region, a silicide layer is formed on a silicon layer. Metal capable of being silicidated, such as Ni and Co, is deposited on a silicon layer and heated to conduct a silicidation reaction. Since the silicidation reaction does not occur on an insulating layer, a silicide layer can be formed only on an underlying silicon surface. This process is called a salicidation (self-aligned silicidation) process.
The silicidation process is divided into two stages. At the first stage, primary annealing is performed to form intermediate silicide, and at the second stage after unreacted metal is removed, a secondary silicidation process is performed to form silicide of a low resistivity.
The following techniques have been reported: after a metal layer capable of being silicidated is formed, the surface of the metal layer is covered with a cap layer of TiN or the like having a small oxygen transmission performance to prevent oxidation of the metal layer capable of being silicidated. For example, the primary annealing is performed at a temperature of 400° C. to 550° C., and the secondary annealing is performed at a temperature of 750° C. to 900° C. (IEDM 95-449).
It is also reported that a metal layer capable of being silicidated is formed by sputtering on a heated silicon substrate. For example, a silicon substrate is maintained at 450° C. and a Co film is formed by sputtering and then in-situ annealing is performed in vacuum by maintaining the temperature at 450° C. Primary annealing is performed in a nitrogen atmosphere and an unreacted Co film is removed. Thereafter, secondary annealing is performed in a nitrogen atmosphere (IEDM 95-445).
Japanese Patent Laid-open Publication No. HEI-11-111642 proposes to form a porous insulating layer such as a natural oxide film on a silicon substrate as a barrier layer and to sputter Co on the barrier layer at a high temperature of 450° C. After a Co film is formed by sputtering, in-situ annealing is performed to react the whole quantity of the deposited Co film with the silicon substrate. Thereafter, an unreacted Co layer and barrier layer are removed to perform primary annealing at 600° C. in a nitrogen atmosphere and secondary annealing is performed at 800° C. in a nitrogen atmosphere.
According to another proposal, a silicon substrate is heated to 400° C. without forming a barrier layer, and Co is sputtered at a low speed of 0.05 to 3 nm/sec to react the whole quantity of the sputtered Co with the substrate. Thereafter, primary annealing is performed at 600° C. and secondary annealing is performed at 800° C. in both embodiments described above, sputtering is performed after the sputtering chamber is once evacuated to a vacuum pressure of 10−9 torr.
Japanese Patent Laid-open Publication No. HEI-11-233456 proposes to sputter material which contains Co, while heating a silicon substrate to a temperature of 300° C. to 500° C. and to perform primary annealing in a nitrogen atmosphere at a temperature of 450° C. to 650° C. After an unreacted Co is removed, secondary annealing is performed in a nitrogen atmosphere at a temperature of 700° C. to 900° C. There is no disclosure of a vacuum pressure.
Although various silicidation processes have been proposed, it can be said that the details of a silicidation process capable of providing excellent electric characteristics and excellent controllability are not still elucidated.